scIGPfifo Class Reference

Detailed Description

This class is used to transfer messages from core to core

The input port of the FIFO is in the sender scIGPCB, the output port is in the receiver scIGPCB

Inherits sc_channel, scIGPwrite_if, and scIGPread_if.

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The documentation for this class was generated from the following file:

• scIGPfifo.h